Hardware Integration

jNetWorks SDK provides seamless integration with high-performance hardware through backend abstraction. This allows the same API code to leverage software emulation or hardware acceleration without changes.

Backends can substitute software processors with hardware-offloaded implementations via SPI during the specification lifecycle (resolve/build stages). This enables transparent use of hardware capabilities for features like reassembly, hashing, and dissection.

Supported Backends

Backend	License	Key Hardware Features	Integration Notes
libpcap	Apache 2.0	Software-only; single-packet buffering	Ideal for development; no offload
DPDK	Commercial	Zero-copy multi-packet buffers, RSS hashing, descriptors	Kernel-bypass for 100G+ interfaces
Napatech	Commercial	IP frag table offload, advanced descriptors, dissection	SmartNIC hardware acceleration

Transparent Offload Mechanism

The ProtocolStack uses SPI (ProtocolStackService) to query backend capabilities during resolution:

• BackendContext: Exposes hardware features (e.g., hasCapability(Capability.IP_REASSEMBLY_OFFLOAD)).

• resolve(): Validates user specs against hardware; adjusts if needed (e.g., fallback to software if unsupported).

• build(): Substitutes processors (e.g., replace IpProcessor with hardware-accelerated version).

Example configuration (automatic offload):

stack.getProtocol(IpProtocol.class)
     .enableReassembly()
     .preferHardwareOffload(true);  // Fallback to software if unavailable

If hardware supports it, the backend provides the implementation — user code remains unchanged.

Backend-Specific Offloads

Napatech (NTAPI) Backend

Napatech SmartNICs offload complex operations to hardware, reducing CPU load.

• IP Fragment Table Offload: Hardware-managed reassembly table for IPv4/IPv6 fragments. Supports large tables (e.g., 1M entries) with timeout eviction.

• Hash Generation: Built-in RSS hashing (2/3/5-tuple) for flow distribution across queues/cores.

• Advanced Hardware Packet Descriptors: Rich metadata including timestamps (ns precision), VLAN tags, tunnel info, and error flags. Exposed via DescriptorSystem.

• Protocol Dissection Offload: Hardware-accelerated header parsing up to L4 (Ethernet, IP, TCP/UDP). Reduces software dissection overhead.

Buffering: Zero-copy multi-packet rings (batches of 100s of packets per poll) for low-latency processing.

DPDK Backend

DPDK provides kernel-bypass for high-throughput NICs.

• Hash Generation: Software-emulated or hardware RSS (depending on NIC); supports 2/3/5-tuple for flow affinity.

• Advanced Packet Descriptors: NIC-specific metadata (e.g., Intel/AMD: timestamps, VLAN, checksum offload status).

• Protocol Dissection: Software-based, but optimized with vectorized instructions (AVX/SSE).

Buffering: Zero-copy mbuf chains with multi-packet burst mode (e.g., poll 32+ packets at once) for efficient batch processing.

No native IP frag table — uses software emulation unless NIC provides it.

libpcap Backend (Software Fallback)

• Single-packet buffering only — one next() call per packet.

• No hardware offloads; all features (hashing, dissection) emulated in software.

• Useful for testing; automatically used if no commercial license.

Zero-Copy Multi-Packet Buffering

DPDK and Napatech support zero-copy access to batches of packets directly from hardware rings:

• Multi-Packet Polling: Streams can take() multiple packets in one call, reducing syscall overhead.

• Zero-Copy: Direct memory mapping to NIC buffers — no data copies until needed (e.g., for modification).

• libpcap Contrast: Always single-packet mode (dispatch() or loop() callbacks one at a time).

Example in multi-packet mode (DPDK/Napatech):

Packet[] batch = stream.takeBatch(32);  // Poll up to 32 packets
try {
    for (Packet p : batch) {
        // Process
    }
} finally {
    stream.releaseBatch(batch);
}

Customizing Offloads via ProtocolStack SPI

Backends register custom processors/analyzers via SPI:

• Implement ProcessorFactory for hardware-specific replacements.

• During ProtocolStackService.build(), compatible processors are swapped in.

This enables features like Napatech's hardware IP frag table to fully replace software reassembly.

Performance Considerations

• Fallback Gracefully: If hardware offload unavailable, seamlessly uses software (with warning logs).

• Query Capabilities: Use backend.hasCapability(...) in advanced setups.

• Benchmarking: Test with/without offloads to measure gains (e.g., 50-80% CPU reduction on Napatech).

See Tutorials for examples using offloaded reassembly.

Hardware integration makes jNetWorks the go-to for production-scale network apps in Java.